Scheda Generatore Orologio Si5351A 25Mhz da 8Khz a 160Mhz per D9I2 R3Y87251

Supports HCSL compatible swing. clock input (CLKIN). Very low power consumption. cost-sensitive applications.Based on a PLL/VCXO + high resolution MultiSynth fractional divider architecture, the Si5351 can generate any frequency up to 160 MHz on each of its outputs with 0 ppm error.

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